Monday, October 27, 2025

A 3-to-8 decoder requires how many enable inputs?

 

401. A 3-to-8 decoder requires how many enable inputs?
A) 1
B) 2
C) 3
D) 0
Answer: A
Explanation: Most decoders include 1 enable input to activate outputs.


402. A 4×1 MUX can implement
A) 1-variable function
B) 2-variable function
C) 3-variable function
D) 4-variable function
Answer: C
Explanation: 4×1 MUX → 2 select lines + 1 input variable = 3-variable logic function.


403. The major advantage of CMOS over TTL is
A) Speed
B) Power consumption
C) Fan-out
D) Price
Answer: B
Explanation: CMOS consumes negligible static power.


404. In a JK flip-flop, output toggles when
A) J=K=0
B) J=1, K=0
C) J=0, K=1
D) J=K=1
Answer: D
Explanation: J=K=1 → toggle condition.


405. The parity bit is used for
A) Counting
B) Error detection
C) Timing
D) Synchronization
Answer: B
Explanation: Parity detects single-bit errors in data transmission.


406. How many flip-flops are needed for a MOD-32 counter?
A) 3
B) 4
C) 5
D) 6
Answer: C
Explanation: 2⁵ = 32 → requires 5 flip-flops.


407. The logic 1 in negative logic system means
A) High voltage
B) Low voltage
C) Undefined
D) Floating
Answer: B
Explanation: Negative logic → logic 1 represented by LOW voltage.


408. A D flip-flop eliminates
A) Setup time
B) Hold time
C) Race-around condition
D) Propagation delay
Answer: C
Explanation: D-FF has only one input → no racing.


409. EEPROM is erased using
A) UV light
B) Electrical signals
C) Magnetic field
D) Heat
Answer: B
Explanation: EEPROM → Electrically Erasable Programmable ROM.


410. The main difference between PROM and EPROM is
A) Programming method
B) Size
C) Cost
D) Voltage
Answer: A
Explanation: PROM → once programmable; EPROM → erasable and reprogrammable.


411. Binary 101011 = ___ decimal.
A) 41
B) 43
C) 45
D) 47
Answer: B
Explanation: 32 + 8 + 2 + 1 = 43.


412. The input combination that makes AND gate output 0 is
A) 0, 0
B) 0, 1
C) 1, 0
D) Any input = 0
Answer: D
Explanation: AND output = 1 only if all inputs = 1.


413. Which gate is used in an even parity generator?
A) OR
B) AND
C) XOR
D) NAND
Answer: C
Explanation: XOR is used for parity generation/detection.


414. Which circuit is used to compare two binary numbers?
A) Encoder
B) Comparator
C) Decoder
D) MUX
Answer: B
Explanation: Comparator outputs signals indicating magnitude relation.


415. The 2’s complement of 11101010 =
A) 00010110
B) 00010101
C) 00010100
D) 11101011
Answer: A
Explanation: Invert bits → 00010101; add 1 → 00010110.


416. The characteristic equation of JK flip-flop =
A) Qₙ₊₁ = JQ’ + K’Q
B) Qₙ₊₁ = J + K’Q
C) Qₙ₊₁ = Q’ + JK
D) None
Answer: A
Explanation: Derived from JK truth table.


417. Which counter counts up and down?
A) Ring counter
B) Johnson counter
C) Up-down counter
D) Binary counter
Answer: C
Explanation: Up-down counter can increment and decrement count.


418. A 4-bit ripple counter uses flip-flops with 10 ns delay each. Total delay =
A) 10 ns
B) 20 ns
C) 30 ns
D) 40 ns
Answer: D
Explanation: Ripple counter delay = n × tpd → 4 × 10 ns = 40 ns.


419. The disadvantage of asynchronous counter is
A) Complex design
B) High speed
C) Cumulative delay
D) None
Answer: C
Explanation: Ripple effect → propagation delay increases.


420. The primary advantage of synchronous counter =
A) Simple
B) Faster operation
C) Fewer gates
D) No memory
Answer: B
Explanation: All flip-flops clocked together → less delay.


421. The minimum number of NAND gates required to implement OR =
A) 1
B) 2
C) 3
D) 4
Answer: C
Explanation: Using DeMorgan → OR = NAND–NAND implementation.


422. The gray code has advantage over binary because
A) It is faster
B) Only one bit changes at a time
C) More compact
D) Easier conversion
Answer: B
Explanation: Reduces errors in transitions (minimizes ambiguity).


423. ASCII code uses how many bits?
A) 6
B) 7
C) 8
D) 9
Answer: B
Explanation: Standard ASCII = 7-bit code.


424. An edge-triggered flip-flop changes state
A) On any clock level
B) On clock edge
C) Randomly
D) After delay
Answer: B
Explanation: Edge-triggered → responds to clock transition.


425. The Boolean expression for NOR gate =
A) (A + B)’
B) A’ + B’
C) AB’
D) A’B’
Answer: A
Explanation: NOR → complement of OR.


426. In a 3-bit up counter, after 111 the next state =
A) 000
B) 001
C) 010
D) 111
Answer: A
Explanation: Counter rolls over after maximum value.


427. Which code is not a weighted code?
A) BCD
B) Excess-3
C) Gray
D) 2421
Answer: C
Explanation: Gray code → non-weighted.


428. The Boolean equation A’B + AB’ represents
A) AND
B) OR
C) XOR
D) NOR
Answer: C
Explanation: A’B + AB’ = A ⊕ B.


429. The propagation delay of a ripple adder increases with
A) Number of inputs
B) Number of bits
C) Clock speed
D) Fan-out
Answer: B
Explanation: Each stage adds carry delay.


430. The binary equivalent of decimal 125 =
A) 1111010
B) 1111101
C) 1111100
D) 1111001
Answer: B
Explanation: 125₁₀ = 1111101₂.


431. The resolution of a DAC depends on
A) Step size
B) Reference voltage
C) Number of bits
D) All
Answer: D
Explanation: Resolution ∝ (Vref / 2ⁿ).


432. The binary of hexadecimal 3F =
A) 11111
B) 110011
C) 00111111
D) 011111
Answer: C
Explanation: 3 → 0011, F → 1111 → 00111111.


433. A priority encoder gives output for
A) Lowest input
B) Highest priority input
C) Any input
D) All
Answer: B
Explanation: Output depends on highest-priority active input.


434. Which gate is known as “inhibit” gate?
A) AND with inverted input
B) OR with inverted input
C) NAND
D) NOR
Answer: A
Explanation: AND with one inverted input → inhibits output.


435. The function of a tri-state buffer is
A) Amplify
B) Delay
C) Provide high impedance
D) Invert
Answer: C
Explanation: Tri-state → 0, 1, or high impedance (Z).


436. A 10-bit ADC can represent how many discrete levels?
A) 512
B) 1024
C) 256
D) 2048
Answer: B
Explanation: 2¹⁰ = 1024 levels.


437. Flash ADC is also called
A) Counter type
B) Parallel comparator type
C) Dual slope
D) Successive approximation
Answer: B
Explanation: Flash uses multiple comparators in parallel.


438. The output of an Exclusive-NOR (XNOR) gate =
A) 1 when inputs equal
B) 1 when inputs differ
C) Always 0
D) Always 1
Answer: A
Explanation: XNOR = equality detector.


439. The resolution of an 8-bit DAC =
A) 1/8
B) 1/128
C) 1/256
D) 1/512
Answer: C
Explanation: Resolution = 1 / 2ⁿ = 1/256.


440. In 8085 microprocessor, the accumulator is
A) 4-bit
B) 8-bit
C) 16-bit
D) 32-bit
Answer: B
Explanation: 8085 = 8-bit processor.


441. The step size of DAC =
A) Vref / 2ⁿ
B) Vref / (2ⁿ–1)
C) 2ⁿ / Vref
D) None
Answer: B
Explanation: Each digital increment corresponds to ΔV = Vref/(2ⁿ–1).


442. The hexadecimal equivalent of binary 10111100 =
A) 7C
B) BC
C) AC
D) DC
Answer: B
Explanation: 1011= B, 1100= C → BC.


443. The fastest counter type is
A) Ripple
B) Asynchronous
C) Synchronous
D) Ring
Answer: C
Explanation: Synchronous → all FFs trigger simultaneously.


444. A 7-segment display decodes which type of data?
A) ASCII
B) Binary
C) BCD
D) Hexadecimal
Answer: C
Explanation: BCD decoded to segments for numeric display.


445. The full form of PLA =
A) Programmable Logic Array
B) Programmable Linear Array
C) Peripheral Logic Array
D) Preloaded Logic Assembly
Answer: A
Explanation: PLA implements custom logic functions.


446. The ROM content cannot be
A) Written
B) Read
C) Modified easily
D) Stored
Answer: C
Explanation: ROM → read-only, not easily changed.


447. A Johnson counter with 5 flip-flops has how many states?
A) 5
B) 8
C) 10
D) 16
Answer: C
Explanation: Johnson → 2n states → 2×5 = 10.


448. A full adder adds
A) Two bits
B) Two bits & carry
C) Three bits
D) One bit
Answer: C
Explanation: Full adder adds A, B, and Cin.


449. A 12-bit ADC has resolution of
A) 1/1024
B) 1/2048
C) 1/4096
D) 1/8192
Answer: C
Explanation: 2¹² = 4096 levels → resolution = 1/4096.


450. EEPROM stands for
A) Erasable Programmable ROM
B) Electrically Erasable Programmable ROM
C) Enhanced EPROM
D) None
Answer: B
Explanation: EEPROM erased electrically.

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