101. The instruction STA 2050H does what?
A. Store accumulator content to memory address 2050H
B. Load accumulator from 2050H
C. Store accumulator to register A
D. None
Answer: A
Explanation:
STA means Store Accumulator — data in A is written to memory address specified.
102. The instruction LDA 3000H does what?
A. Load accumulator from memory address 3000H
B. Load accumulator with immediate data 3000H
C. Load accumulator with register B
D. None
Answer: A
Explanation:
LDA means Load Accumulator Direct — fetches data from the given 16-bit address.
103. The instruction MVI A, 25H means:
A. Move value 25H into A
B. Move value from A to 25H
C. Add 25H to A
D. None
Answer: A
Explanation:
MVI = Move Immediate → loads the immediate 8-bit data into the specified register.
104. The opcode of MOV A,B is:
A. 78H
B. 47H
C. 7FH
D. 4FH
Answer: A
Explanation:
MOV A,B transfers data from B to A. Opcode for MOV A,B = 78H.
105. The instruction CPI 32H compares:
A. Accumulator with 32H
B. Register B with 32H
C. Register C with accumulator
D. Memory with 32H
Answer: A
Explanation:
CPI compares immediate data (32H) with accumulator contents and sets flags accordingly.
106. The flag affected by logical AND operation is:
A. Carry flag
B. Auxiliary carry flag
C. Zero flag
D. Sign flag
Answer: C
Explanation:
Logical operations reset carry flag and affect Zero, Sign, and Parity flags depending on result.
107. After executing XRA A, accumulator contains:
A. FFH
B. 00H
C. A’s complement
D. No change
Answer: B
Explanation:
XRA A performs XOR of A with itself → result = 0 → all flags reset except Zero flag = 1.
108. The instruction INX H does what?
A. Increment HL pair by 1
B. Increment H by 1
C. Increment L by 1
D. None
Answer: A
Explanation:
INX increments a 16-bit register pair (HL, DE, BC, SP) by one.
109. The instruction DCX H does what?
A. Decrement HL pair by 1
B. Decrement H only
C. Decrement accumulator
D. None
Answer: A
Explanation:
DCX decrements a 16-bit register pair.
110. The instruction ADI 05H means:
A. Add 05H to accumulator
B. Add accumulator to 05H
C. Add 05H to register B
D. None
Answer: A
Explanation:
ADI = Add Immediate → adds 8-bit data to accumulator.
111. The instruction SUI 10H performs:
A. A ← A – 10H
B. A ← A + 10H
C. A ← A × 10H
D. None
Answer: A
Explanation:
SUI = Subtract Immediate → subtracts 8-bit immediate data from accumulator.
112. The instruction ORA B performs:
A. A ← A OR B
B. A ← A AND B
C. A ← A XOR B
D. None
Answer: A
Explanation:
ORA performs bitwise OR between A and specified register.
113. The instruction ANA B performs:
A. A ← A AND B
B. A ← A OR B
C. A ← A XOR B
D. None
Answer: A
Explanation:
ANA performs bitwise AND between accumulator and register B.
114. The instruction CMA means:
A. Complement accumulator
B. Clear accumulator
C. Copy accumulator
D. None
Answer: A
Explanation:
CMA inverts all bits of accumulator (A = A’).
115. The instruction CMC means:
A. Complement Carry flag
B. Clear Carry flag
C. Copy Carry flag
D. None
Answer: A
Explanation:
CMC flips the Carry flag — if CY=1, becomes 0; if 0, becomes 1.
116. Which instruction sets the Carry flag to 1?
A. CMC
B. STC
C. CYR
D. SCF
Answer: B
Explanation:
STC = Set Carry flag → sets CY = 1.
117. The 8085 microprocessor has how many general purpose registers?
A. 5
B. 6
C. 7
D. 8
Answer: B
Explanation:
Registers B, C, D, E, H, L are general-purpose 8-bit registers.
118. The instruction PUSH H does what?
A. Store H and L on stack
B. Store only H on stack
C. Pop H and L from stack
D. None
Answer: A
Explanation:
PUSH H pushes 16-bit HL pair onto stack (L first, then H).
119. The instruction POP D does what?
A. Load DE pair from top of stack
B. Load only D register
C. Push DE pair
D. None
Answer: A
Explanation:
POP D retrieves two bytes from stack into DE pair.
120. The instruction HLT means:
A. Stop program execution
B. Hold bus
C. Reset CPU
D. None
Answer: A
Explanation:
HLT halts the CPU until reset or interrupt occurs.
No comments:
Post a Comment