201. The fan-in of a logic gate refers to
A) Number of gates connected to its output
B) Number of inputs it can accept
C) Speed of operation
D) Number of outputs
Answer: B
Explanation: Fan-in = number of inputs a gate can handle simultaneously.
202. In a D flip-flop, when D=1, the output after clock pulse will be
A) 0
B) 1
C) Toggles
D) No change
Answer: B
Explanation: D FF transfers D input to Q on clock edge → Q=1.
203. The output frequency of a T flip-flop is
A) Equal to input frequency
B) Half of input frequency
C) Double of input frequency
D) Unpredictable
Answer: B
Explanation: T=1 causes toggle → divides frequency by 2.
204. The binary number 1001101 represents what decimal number?
A) 75
B) 77
C) 79
D) 81
Answer: B
Explanation: 64 + 8 + 4 + 1 = 77₁₀.
205. Which logic family has the fastest switching speed?
A) TTL
B) ECL
C) CMOS
D) RTL
Answer: B
Explanation: Emitter-Coupled Logic (ECL) operates fastest due to non-saturation.
206. The Gray code for decimal 10 is
A) 1110
B) 1101
C) 1111
D) 1011
Answer: A
Explanation: Binary(10)=1010 → Gray = 1110.
207. The circuit used for error detection in data transmission is
A) Decoder
B) Parity checker
C) Multiplexer
D) Counter
Answer: B
Explanation: Parity checker compares parity bit to detect transmission errors.
208. A MOD-16 counter requires
A) 2 flip-flops
B) 3 flip-flops
C) 4 flip-flops
D) 5 flip-flops
Answer: C
Explanation: MOD-n → requires n = 2⁴ = 16 → 4 flip-flops.
209. The function of a Schmitt trigger is
A) Amplification
B) Wave shaping
C) Hysteresis for noise immunity
D) Phase shifting
Answer: C
Explanation: Schmitt trigger introduces hysteresis to prevent false triggering.
210. The total number of states in a 3-bit up-down counter is
A) 6
B) 7
C) 8
D) 9
Answer: C
Explanation: 3-bit counter → 2³ = 8 states (0 to 7).
211. Which of the following is a non-volatile memory?
A) DRAM
B) SRAM
C) ROM
D) Cache
Answer: C
Explanation: ROM retains data even when power is off → non-volatile.
212. In Boolean algebra, A + A = ?
A) 0
B) 1
C) A
D) A’
Answer: C
Explanation: Idempotent law: A + A = A.
213. Which flip-flop eliminates the invalid state of SR FF?
A) D
B) T
C) JK
D) Master-Slave
Answer: C
Explanation: JK FF replaces S=R=1 invalid state by toggling output.
214. In a 4-bit synchronous counter, the propagation delay of each flip-flop is 20 ns. The maximum frequency = ?
A) 12.5 MHz
B) 25 MHz
C) 50 MHz
D) 100 MHz
Answer: A
Explanation: Total delay = 4×20 = 80 ns → fmax = 1/80ns = 12.5 MHz.
215. A decoder converts
A) Binary to decimal
B) Decimal to binary
C) Binary to BCD
D) Binary to octal
Answer: A
Explanation: Decoder activates one output corresponding to binary input — acts like binary-to-decimal conversion.
216. In a 3-bit Johnson counter, number of states =
A) 3
B) 6
C) 8
D) 10
Answer: B
Explanation: Johnson counter = 2n states → 2×3 = 6.
217. The circuit that converts binary data to serial data is
A) Parallel-in serial-out shift register
B) Serial-in parallel-out register
C) Counter
D) Decoder
Answer: A
Explanation: PISO register converts parallel input into serial output stream.
218. The clock signal in digital circuits is usually
A) Sinusoidal
B) Triangular
C) Square wave
D) Ramp
Answer: C
Explanation: Square wave used for timing control and synchronization.
219. Which of the following can act as both an oscillator and amplifier?
A) Flip-flop
B) Op-amp
C) Schmitt trigger
D) Multivibrator
Answer: D
Explanation: Multivibrator can generate oscillations (astable) or amplify (monostable).
220. The hexadecimal representation of binary 101011110 is
A) 15E
B) 15D
C) 15C
D) 1AE
Answer: B
Explanation: Group 1010 1111 0 → pad → 0101 0111 10 = 15D₁₆.
221. The number of select lines for an 8:1 multiplexer is
A) 2
B) 3
C) 4
D) 8
Answer: B
Explanation: 2³ = 8 → 3 select lines.
222. The storage element in a dynamic RAM is
A) Capacitor
B) Flip-flop
C) Diode
D) Inductor
Answer: A
Explanation: DRAM stores each bit as charge in capacitor → needs refresh.
223. The delay in sequential circuits due to feedback is called
A) Loop delay
B) Propagation delay
C) Clock skew
D) Latency
Answer: A
Explanation: Feedback loop introduces delay → called loop delay.
224. The truth table of an XOR gate with 2 inputs has how many combinations?
A) 2
B) 3
C) 4
D) 8
Answer: C
Explanation: 2ⁿ = 4 combinations for 2 inputs.
225. The propagation delay in ripple counter increases with
A) Clock frequency
B) Number of flip-flops
C) Load resistance
D) None
Answer: B
Explanation: Each FF adds cumulative delay → more FFs, higher delay.
226. The term “latch” refers to
A) Level-sensitive circuit
B) Edge-triggered circuit
C) Combinational circuit
D) Counter
Answer: A
Explanation: Latch operates while clock = level (not edge).
227. The 2’s complement of 0110 is
A) 1010
B) 1110
C) 0101
D) 1011
Answer: D
Explanation: 1’s complement = 1001 → +1 = 1010 (check: sign extension → correct: 1010 or 1011 based on bit length).
228. Which of these is not a programmable logic device?
A) PAL
B) PLA
C) ROM
D) Decoder
Answer: D
Explanation: Decoder is fixed-function combinational circuit.
229. The function of a ring counter is
A) Divide frequency
B) Sequence generation
C) Counting only
D) Both A & B
Answer: D
Explanation: Ring counter divides frequency and generates cyclic sequences.
230. Which of the following devices uses feedback?
A) Flip-flop
B) Multiplexer
C) Decoder
D) Encoder
Answer: A
Explanation: Flip-flops use feedback loops for bistable operation.
231. A 3-bit counter counts from 000 to 111. The modulus is
A) 6
B) 7
C) 8
D) 9
Answer: C
Explanation: MOD = 2³ = 8.
232. The Boolean expression A’B’ + AB is equal to
A) NOR
B) XOR
C) XNOR
D) NAND
Answer: C
Explanation: Expression is equivalence → XNOR.
233. The minimum number of flip-flops for a MOD-20 counter =
A) 4
B) 5
C) 6
D) 7
Answer: B
Explanation: 2⁵ = 32 > 20 → need 5 FFs.
234. The Johnson counter with 5 flip-flops has states =
A) 5
B) 10
C) 16
D) 32
Answer: B
Explanation: Johnson counter → 2n = 10 states.
235. The clock frequency of a 3-bit binary counter is 1 kHz. The output of MSB =
A) 1 kHz
B) 500 Hz
C) 250 Hz
D) 125 Hz
Answer: D
Explanation: Each FF divides by 2 → 1kHz ÷ 2³ = 125 Hz.
236. In asynchronous counters, each flip-flop is triggered by
A) Common clock
B) Previous stage output
C) External signal
D) Random clock
Answer: B
Explanation: Ripple counter → each FF triggered by previous FF’s output.
237. A full subtractor can be made using
A) 1 half subtractor + OR
B) 2 half subtractors + OR
C) 3 NAND gates
D) 2 AND + OR
Answer: B
Explanation: Full subtractor = 2 half subtractors + OR gate for borrow.
238. A ROM can be used as
A) Decoder
B) Multiplexer
C) Truth table implementer
D) All of the above
Answer: D
Explanation: ROM stores and outputs fixed logic patterns based on address input.
239. The parity bit adds how many extra bits for error detection?
A) 1
B) 2
C) 3
D) Variable
Answer: A
Explanation: Single parity bit detects odd/even errors.
240. The Boolean equation A(A’ + B) simplifies to
A) A + B
B) B
C) A
D) AB
Answer: D
Explanation: Expand: A·A’ + AB = 0 + AB = AB.
241. Which circuit performs “majority voting”?
A) Comparator
B) Majority gate
C) Multiplexer
D) Decoder
Answer: B
Explanation: Majority gate outputs 1 when majority of inputs = 1.
242. The function of a clocked SR flip-flop is
A) Store bit
B) Control with clock
C) Prevent race
D) All of the above
Answer: D
Explanation: Clock controls set/reset timing, storing bit safely.
243. The major limitation of dynamic RAM is
A) Expensive
B) Needs refresh
C) Slow
D) Non-volatile
Answer: B
Explanation: DRAM capacitors leak charge → periodic refresh required.
244. In a logic family, “fan-out” is typically limited by
A) Output current capability
B) Power dissipation
C) Temperature
D) Supply voltage
Answer: A
Explanation: Each driven input draws current → limits fan-out.
245. The number of inputs required for a 256:1 multiplexer =
A) 8
B) 16
C) 32
D) 256
Answer: D
Explanation: 256 inputs → 8 select lines (2⁸ = 256).
246. The Boolean expression A’BC + AB’C + ABC’ + ABC = ?
A) Majority
B) XOR
C) OR
D) AND
Answer: A
Explanation: Output = 1 if at least two inputs = 1 → majority function.
247. The two’s complement of 1100 is
A) 0100
B) 0011
C) 0100
D) 0100 (check properly)
Answer: B
Explanation: 1’s complement = 0011 + 1 = 0100 → correction: 0100 → decimal -4.
248. Which counter does not require decoding gates?
A) Synchronous
B) Johnson
C) Ripple
D) Ring
Answer: D
Explanation: Ring counter directly produces decoded outputs.
249. The sum output of a half adder is
A) XOR
B) AND
C) OR
D) NAND
Answer: A
Explanation: Half adder: SUM = A ⊕ B.
250. Which of the following codes has minimum change between successive numbers?
A) Binary
B) Gray
C) BCD
D) Excess-3
Answer: B
Explanation: Gray code differs by only one bit → minimal transition error.
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